In most areas of semiconductor processing, the cost of the starting substrate wafer is small compared to the value of the final, processed wafer. However, this is not always the case. For example, the photovoltaic solar cell industry is extremely cost sensitive, and the cost of a starting silicon wafer is typically nearly half of the processed wafer value. Thus, in this industry it is extremely important that the silicon substrates are used as efficiently as possible. These substrates are produced by sawing thin slices from a cylindrical boule of crystalline silicon, typically 6 inches (about 15 cm) in diameter. The thinnest slice that can be cut is determined by the mechanical properties of the silicon, and is typically 300-400 μm for the current generation of 6 inch wafers, but is projected to be 200 μm for the next wafer generation. However, the kerf loss for sawing through a 6 inch wafer is approximately 250 μm, meaning that much of the boule ends up as powder. There is a need, therefore, for a method which increases the useful surface area of semiconductor for a given unit volume of the semiconductor, or at least for a useful alternative to current methods of semiconductor processing.